commit 3e89880c10d9f6090170818c6878971d30fac561 Author: Christoffer Martinsson Date: Sat Nov 22 16:41:22 2014 +0100 first commit diff --git a/MainMotorDriver/ASM/MainMotorDriver.COD b/MainMotorDriver/ASM/MainMotorDriver.COD new file mode 100755 index 0000000..3dc8042 Binary files /dev/null and b/MainMotorDriver/ASM/MainMotorDriver.COD differ diff --git a/MainMotorDriver/ASM/MainMotorDriver.HEX b/MainMotorDriver/ASM/MainMotorDriver.HEX new file mode 100755 index 0000000..6a5ac8c --- /dev/null +++ b/MainMotorDriver/ASM/MainMotorDriver.HEX @@ -0,0 +1,20 @@ +:020000040000FA +:020000002C28AA +:080008000528A000030E83018E +:10001000A10083120C1C0E280C101010210E83005E +:10002000A00E200E090026201F201F201F201F20A9 +:100030001F201F201F201F20A30D03110800A30D48 +:10004000A20D031C2628A20203140800A202031812 +:100050000800A207031008008312870185010730FA +:10006000990093014C30950081309F0083160D302C +:1000700085008701013091003F30920020309F00C1 +:10008000CF308100831212158B178312640005197B +:100090004728051D49288F018E01101405194E2887 +:1000A000101020308E024E308F020F08273C031DA7 +:1000B000031C5B286128951310308E0227308F02B5 +:1000C00069289517FF308F068E06EF308E02D830E4 +:1000D0008F020F08A2000E08A3002830132003107F +:1000E00023080339A400A40DA40DA40DA40D150824 +:1000F000CF39240495002308FC39A400A40CA40CD7 +:06010000240893004528CD +:00000001FF diff --git a/MainMotorDriver/ASM/MainMotorDriver.asm b/MainMotorDriver/ASM/MainMotorDriver.asm new file mode 100755 index 0000000..6c036e3 --- /dev/null +++ b/MainMotorDriver/ASM/MainMotorDriver.asm @@ -0,0 +1,300 @@ +;========================================================================================================== +; +; Wingman MainMotorDriver copyright 2005 v1.0 (2005-04-22) +; +; Name: Christoffer Martinsson +; E-mail: cm@wsm.se +; +; +;========================================================================================================== + +include P16F684.INC + +; Temp-registers +W_TEMP EQU 0x20 ; TempRegister for interrupt-routine +STATUS_TEMP EQU 0x21 ; TempRegister for interrupt-routine +DivRegH EQU 0x22 ; TempRegister for div-routine +DivRegL EQU 0x23 ; TempRegister for div-routine +SetPWM_Temp EQU 0x24 + +; Time-definitions +minPulseValue =.20000 +maxPulseValue =.40000 +ms1Value =.20000 +ms05Value =.10000 + +;========================================================================================================== +; Reset- and Interrupt-vectors +;========================================================================================================== + ORG 0x0000 + GOTO Main ;Reset-vector + ORG 0x0004 + GOTO Interrupt ;Interrupt-vector +;========================================================================================================== +; Macro +;========================================================================================================== +;---------------------------------------------------------------------------------------------------------- +; StoreWregInTemp +; +; Description: Store Status and working-register in temp-registers +; +; Input: - +; ChangedReg: W_TEMP,STATUS_TEMP +; UsedReg: W,STATUS,W_TEMP,STATUS_TEMP +;---------------------------------------------------------------------------------------------------------- +StoreWregInTemp MACRO + MOVWF W_TEMP ;Copy W to TEMP register + SWAPF STATUS,W ;Swap status to be saved into W + CLRF STATUS ;bank 0, regardless of current bank, Clears IRP,RP1,RP0 + MOVWF STATUS_TEMP ;Save status to bank zero STATUS_TEMP register + ENDM +;---------------------------------------------------------------------------------------------------------- +; RestoreWregFromTemp +; +; Description: Restore Status and working-register from temp-registers +; +; Input: - +; ChangedReg: W,STATUS +; UsedReg: W,STATUS,W_TEMP,STATUS_TEMP +;---------------------------------------------------------------------------------------------------------- +RestoreWregFromTemp MACRO + SWAPF STATUS_TEMP,W ;Swap STATUS_TEMP register into W (sets bank to original state) + MOVWF STATUS ;Move W into Status register + SWAPF W_TEMP,F ;Swap W_TEMP + SWAPF W_TEMP,W ;Swap W_TEMP into W + ENDM +;---------------------------------------------------------------------------------------------------------- +; Sub16L +; +; Description: Subtract literal from 16bit-register. Reg = Reg - Number, WITH VALID CARRY +; +; Input: RegH, RegL, Number +; ChangedReg: C +; UsedReg: W +;---------------------------------------------------------------------------------------------------------- +Sub16L MACRO RegH, RegL, Number + MOVLW low Number + SUBWF RegL + MOVLW high Number + ;BTFSS STATUS,C + ;INCFSZ high Number,W + SUBWF RegH + ENDM +;---------------------------------------------------------------------------------------------------------- +; Set16L +; +; Description: Sets 16bit-register to literal. Reg = Number +; +; Input: RegH, RegL, Number +; ChangedReg: C +; UsedReg: W +;---------------------------------------------------------------------------------------------------------- +Set16L MACRO RegH, RegL, Number + MOVLW low Number + MOVWF RegL + MOVLW high Number + MOVWF RegH + ENDM +;---------------------------------------------------------------------------------------------------------- +; Clear16 +; +; Description: Clear 16bit-register. +; +; Input: RegH, RegL +; ChangedReg: +; UsedReg: +;---------------------------------------------------------------------------------------------------------- +Clear16 MACRO RegH, RegL + CLRF RegH + CLRF RegL + ENDM +;---------------------------------------------------------------------------------------------------------- +; Comp16L +; +; Description: Compare one 16bit-registers to literal if Reg1=Number then Z=1. +; if Reg1 maxPulseValue (~2ms) + ; GOTO Mainloop ; then goto Mainloop + Sub16L TMR1H,TMR1L,ms1Value ; else counter-value - 1ms + Comp16L TMR1H,TMR1L,ms05Value + BTFSS STATUS,C ; If counter > 0,5ms + GOTO PWM_Fwr ; then goto PWM_forward + GOTO PWM_Rev ; else goto PWN_reverse + +PWM_Fwr: BCF CCP1CON,P1M1 ; Set H-bridge in forward-mode + Sub16L TMR1H,TMR1L,ms05Value ; counter-value - 0,5ms + GOTO PWM_SetVal ; goto PWM_SetValue +PWM_Rev: BSF CCP1CON,P1M1 ; Set H-bridge in reverse-mode + MOVLW 0xFF + XORWF TMR1H,F ; Invert counterH + XORWF TMR1L,F ; Invert counterL + Sub16L TMR1H,TMR1L,(0xFFFF-ms05Value) ; Inverted counter-value - (65535-0,5ms) + +PWM_SetVal: MOVF TMR1H,W ; Divide by 79... + MOVWF DivRegH ; Load div-routine with countervalue + MOVF TMR1L,W + MOVWF DivRegL ; Load div-routine with countervalue + MOVLW ((ms05Value/0xFF)+1) ; Load div-routine with divide-value + CALL Div16byL ; Divide! + + SetPWM DivRegL + + GOTO Mainloop + END +;========================================================================================================== +; END +;========================================================================================================== diff --git a/MainMotorDriver/ASM/MainMotorDriver.asxx b/MainMotorDriver/ASM/MainMotorDriver.asxx new file mode 100755 index 0000000..88703f0 --- /dev/null +++ b/MainMotorDriver/ASM/MainMotorDriver.asxx @@ -0,0 +1,255 @@ +;========================================================================================================== +; +; Wingman MainMotorDriver copyright 2005 v1.0 (2005-04-16) +; +; Name: Christoffer Martinsson +; E-mail: cm@wsm.se +; +; +;========================================================================================================== + +include P16F684.INC + +W_TEMP EQU 0x20 ; TempRegister +STATUS_TEMP EQU 0x21 ; TempRegister + +PPM_ValueH EQU 0x22 +PPM_ValueL EQU 0x23 + +PulseInH EQU 0x24 +PulseInL EQU 0x25 + +;========================================================================================================== +; Reset- and Interrupt-vectors +;========================================================================================================== + ORG 0x0000 + GOTO Main ;Reset-vector + ORG 0x0004 + GOTO Interrupt ;Interrupt-vector +;========================================================================================================== +; Macro +;========================================================================================================== +;---------------------------------------------------------------------------------------------------------- +; StoreWregInTemp +; +; Description: Store Status and working-register in temp-registers +; +; Input: - +; ChangedReg: - +; UsedReg: W,STATUS,W_TEMP,STATUS_TEMP +;---------------------------------------------------------------------------------------------------------- +StoreWregInTemp MACRO + MOVWF W_TEMP ;Copy W to TEMP register + SWAPF STATUS,W ;Swap status to be saved into W + CLRF STATUS ;bank 0, regardless of current bank, Clears IRP,RP1,RP0 + MOVWF STATUS_TEMP ;Save status to bank zero STATUS_TEMP register + ENDM +;---------------------------------------------------------------------------------------------------------- +; RestoreWregFromTemp +; +; Description: Restore Status and working-register from temp-registers +; +; Input: - +; ChangedReg: W,STATUS +; UsedReg: W,STATUS,W_TEMP,STATUS_TEMP +;---------------------------------------------------------------------------------------------------------- +RestoreWregFromTemp MACRO + SWAPF STATUS_TEMP,W ;Swap STATUS_TEMP register into W (sets bank to original state) + MOVWF STATUS ;Move W into Status register + SWAPF W_TEMP,F ;Swap W_TEMP + SWAPF W_TEMP,W ;Swap W_TEMP into W + ENDM +;---------------------------------------------------------------------------------------------------------- +; Compare16 +; +; Description: Compare two 16bit-registers if Reg1=Reg2 then Z=1. +; if Reg1 maxPulseValue (~2ms) + 00271 ; GOTO Mainloop ; then g + oto Mainloop + 00272 Sub16L TMR1H,TMR1L,ms1Value ; else counter-value - 1 + ms +0051 3020 M MOVLW low ms1Value +Message[305]: Using default destination of 1 (file). +0052 028E M SUBWF TMR1L +0053 304E M MOVLW high ms1Value + M ;BTFSS STATUS,C + M ;INCFSZ high Number,W +Message[305]: Using default destination of 1 (file). +0054 028F M SUBWF TMR1H + 00273 Comp16L TMR1H,TMR1L,ms05Value +0055 080F M MOVF TMR1H,W +0056 3C27 M SUBLW high ms05Value + +0057 1D03 M BTFSS STATUS,Z + + M EXITM +0058 1C03 00274 BTFSS STATUS,C ; If cou + nter > 0,5ms +0059 285B 00275 GOTO PWM_Fwr ; then g + oto PWM_forward +005A 2861 00276 GOTO PWM_Rev ; else g + oto PWN_reverse + 00277 +005B 1395 00278 PWM_Fwr: BCF CCP1CON,P1M1 ; Set H-bridge i + n forward-mode + 00279 Sub16L TMR1H,TMR1L,ms05Value ; counter-value - 0,5ms +005C 3010 M MOVLW low ms05Value +Message[305]: Using default destination of 1 (file). +005D 028E M SUBWF TMR1L +005E 3027 M MOVLW high ms05Value + M ;BTFSS STATUS,C + M ;INCFSZ high Number,W +Message[305]: Using default destination of 1 (file). +005F 028F M SUBWF TMR1H +0060 2869 00280 GOTO PWM_SetVal ; goto P + WM_SetValue +0061 1795 00281 PWM_Rev: BSF CCP1CON,P1M1 ; Set H-bridge i + n reverse-mode +0062 30FF 00282 MOVLW 0xFF +0063 068F 00283 XORWF TMR1H,F ; Invert + counterH +0064 068E 00284 XORWF TMR1L,F ; Invert + counterL + 00285 Sub16L TMR1H,TMR1L,(0xFFFF-ms05Value) ; Inverted counter-value - (6553 + 5-0,5ms) +0065 30EF M MOVLW low (0xFFFF-ms05Value) +Message[305]: Using default destination of 1 (file). +0066 028E M SUBWF TMR1L + MPASM 5.02 MAINMOTORDRIVER.ASM 3-29-2006 0:37:12 PAGE 9 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0067 30D8 M MOVLW high (0xFFFF-ms05Value) + M ;BTFSS STATUS,C + M ;INCFSZ high Number,W +Message[305]: Using default destination of 1 (file). +0068 028F M SUBWF TMR1H + 00286 +0069 080F 00287 PWM_SetVal: MOVF TMR1H,W ; Divide by 79.. + . +006A 00A2 00288 MOVWF DivRegH ; Load d + iv-routine with countervalue +006B 080E 00289 MOVF TMR1L,W +006C 00A3 00290 MOVWF DivRegL ; Load d + iv-routine with countervalue +006D 3028 00291 MOVLW ((ms05Value/0xFF)+1) ; Load div-routine with + divide-value +006E 2013 00292 CALL Div16byL ; Divide + ! + 00293 + 00294 SetPWM DivRegL +006F 1003 M BCF STATUS,C +0070 0823 M MOVF DivRegL,W +0071 3903 M ANDLW b'00000011' +0072 00A4 M MOVWF SetPWM_Temp +0073 0DA4 M RLF SetPWM_Temp,F +0074 0DA4 M RLF SetPWM_Temp,F +0075 0DA4 M RLF SetPWM_Temp,F +0076 0DA4 M RLF SetPWM_Temp,F +0077 0815 M MOVF CCP1CON,W +0078 39CF M ANDLW b'11001111' +0079 0424 M IORWF SetPWM_Temp,W +007A 0095 M MOVWF CCP1CON +007B 0823 M MOVF DivRegL,W +007C 39FC M ANDLW b'11111100' +007D 00A4 M MOVWF SetPWM_Temp +007E 0CA4 M RRF SetPWM_Temp,F +007F 0CA4 M RRF SetPWM_Temp,F +0080 0824 M MOVF SetPWM_Temp,W +0081 0093 M MOVWF CCPR1L + 00295 +0082 2845 00296 GOTO Mainloop + 00297 END + MPASM 5.02 MAINMOTORDRIVER.ASM 3-29-2006 0:37:12 PAGE 10 + + +SYMBOL TABLE + LABEL VALUE + +ADCON0 0000001F +ADCON1 0000009F +ADCS0 00000004 +ADCS1 00000005 +ADCS2 00000006 +ADFM 00000007 +ADIE 00000006 +ADIF 00000006 +ADON 00000000 +ADRESH 0000001E +ADRESL 0000009E +ANS0 00000000 +ANS1 00000001 +ANS2 00000002 +ANS3 00000003 +ANS4 00000004 +ANS5 00000005 +ANS6 00000006 +ANS7 00000007 +ANSEL 00000091 +C 00000000 +C1IE 00000003 +C1IF 00000003 +C1INV 00000004 +C1OUT 00000006 +C2IE 00000004 +C2IF 00000004 +C2INV 00000005 +C2OUT 00000007 +C2SYNC 00000000 +CCP1CON 00000015 +CCP1IE 00000005 +CCP1IF 00000005 +CCP1M0 00000000 +CCP1M1 00000001 +CCP1M2 00000002 +CCP1M3 00000003 +CCPR1H 00000014 +CCPR1L 00000013 +CHS0 00000002 +CHS1 00000003 +CHS2 00000004 +CIS 00000003 +CM0 00000000 +CM1 00000001 +CM2 00000002 +CMCON0 00000019 +CMCON1 0000001A +Clear16 +Comp16L +DC 00000001 +DC1B0 00000004 +DC1B1 00000005 + MPASM 5.02 MAINMOTORDRIVER.ASM 3-29-2006 0:37:12 PAGE 11 + + +SYMBOL TABLE + LABEL VALUE + +Div16byL 00000013 +DivCode 0000001F +DivRegH 00000022 +DivRegL 00000023 +DivSkipHiShift 00000026 +ECCPAS 00000017 +ECCPAS0 00000004 +ECCPAS1 00000005 +ECCPAS2 00000006 +ECCPASE 00000007 +EEADR 0000009B +EECON1 0000009C +EECON2 0000009D +EEDAT 0000009A +EEDATA 0000009A +EEIE 00000007 +EEIF 00000007 +F 00000001 +FSR 00000004 +GIE 00000007 +GO 00000001 +GO_DONE 00000001 +HTS 00000002 +INDF 00000000 +INTCON 0000000B +INTE 00000004 +INTEDG 00000006 +INTF 00000001 +IOC 00000096 +IOC0 00000000 +IOC1 00000001 +IOC2 00000002 +IOC3 00000003 +IOC4 00000004 +IOC5 00000005 +IOCA 00000096 +IOCA0 00000000 +IOCA1 00000001 +IOCA2 00000002 +IOCA3 00000003 +IOCA4 00000004 +IOCA5 00000005 +IRCF0 00000004 +IRCF1 00000005 +IRCF2 00000006 +IRP 00000007 +Int_Return 0000000E +Interrupt 00000005 +LTS 00000001 +Main 0000002C +Mainloop 00000045 +NOT_BOD 00000000 +NOT_DONE 00000001 + MPASM 5.02 MAINMOTORDRIVER.ASM 3-29-2006 0:37:12 PAGE 12 + + +SYMBOL TABLE + LABEL VALUE + +NOT_PD 00000003 +NOT_POR 00000001 +NOT_RAPU 00000007 +NOT_T1SYNC 00000002 +NOT_TO 00000004 +OPTION_REG 00000081 +OSCCON 0000008F +OSCTUNE 00000090 +OSFIE 00000002 +OSFIF 00000002 +OSTS 00000003 +P1M0 00000006 +P1M1 00000007 +PCL 00000002 +PCLATH 0000000A +PCON 0000008E +PDC0 00000000 +PDC1 00000001 +PDC2 00000002 +PDC3 00000003 +PDC4 00000004 +PDC5 00000005 +PDC6 00000006 +PEIE 00000006 +PIE1 0000008C +PIR1 0000000C +PORTA 00000005 +PORTC 00000007 +PPM_Hi 00000049 +PPM_Lo 00000047 +PPM_Loop 0000004E +PR2 00000092 +PRSEN 00000007 +PS0 00000000 +PS1 00000001 +PS2 00000002 +PSA 00000003 +PSSAC0 00000002 +PSSAC1 00000003 +PSSBD0 00000000 +PSSBD1 00000001 +PWM1CON 00000016 +PWM_Fwr 0000005B +PWM_Rev 00000061 +PWM_SetVal 00000069 +RAIE 00000003 +RAIF 00000000 +RD 00000000 +RP0 00000005 +RP1 00000006 +RestoreWregFromTemp +SBODEN 00000004 +SCS 00000000 + MPASM 5.02 MAINMOTORDRIVER.ASM 3-29-2006 0:37:12 PAGE 13 + + +SYMBOL TABLE + LABEL VALUE + +STATUS 00000003 +STATUS_TEMP 00000021 +SWDTEN 00000000 +Set16L +SetPWM +SetPWM_Temp 00000024 +StoreWregInTemp +Sub16L +T0CS 00000005 +T0IE 00000005 +T0IF 00000002 +T0SE 00000004 +T1CKPS0 00000004 +T1CKPS1 00000005 +T1CON 00000010 +T1GINV 00000007 +T1GSS 00000001 +T1IE 00000000 +T1IF 00000000 +T1OSCEN 00000003 +T2CKPS0 00000000 +T2CKPS1 00000001 +T2CON 00000012 +T2IE 00000001 +T2IF 00000001 +TMR0 00000001 +TMR1CS 00000001 +TMR1GE 00000006 +TMR1H 0000000F +TMR1IE 00000000 +TMR1IF 00000000 +TMR1L 0000000E +TMR1ON 00000000 +TMR2 00000011 +TMR2IE 00000001 +TMR2IF 00000001 +TMR2ON 00000002 +TOUTPS0 00000003 +TOUTPS1 00000004 +TOUTPS2 00000005 +TOUTPS3 00000006 +TRISA 00000085 +TRISC 00000087 +TUN0 00000000 +TUN1 00000001 +TUN2 00000002 +TUN3 00000003 +TUN4 00000004 +Timer1_Int 00000009 +ULPWUE 00000005 +VCFG 00000006 +VR0 00000000 +VR1 00000001 + MPASM 5.02 MAINMOTORDRIVER.ASM 3-29-2006 0:37:12 PAGE 14 + + +SYMBOL TABLE + LABEL VALUE + +VR2 00000002 +VR3 00000003 +VRCON 00000099 +VREN 00000007 +VRR 00000005 +W 00000000 +WDTCON 00000018 +WDTPS0 00000001 +WDTPS1 00000002 +WDTPS2 00000003 +WDTPS3 00000004 +WPU 00000095 +WPUA 00000095 +WR 00000001 +WREN 00000002 +WRERR 00000003 +W_TEMP 00000020 +Z 00000002 +_BOD_NSLEEP 00003EFF +_BOD_OFF 00003CFF +_BOD_ON 00003FFF +_BOD_SBODEN 00003DFF +_CPD_OFF 00003FFF +_CPD_ON 00003F7F +_CP_OFF 00003FFF +_CP_ON 00003FBF +_EC_OSC 00003FFB +_EXTRC 00003FFF +_EXTRCIO 00003FFE +_EXTRC_OSC_CLKOUT 00003FFF +_EXTRC_OSC_NOCLKOUT 00003FFE +_FCMEN_OFF 000037FF +_FCMEN_ON 00003FFF +_HS_OSC 00003FFA +_IESO_OFF 00003BFF +_IESO_ON 00003FFF +_INTOSC 00003FFD +_INTOSCIO 00003FFC +_INTRC_OSC_CLKOUT 00003FFD +_INTRC_OSC_NOCLKOUT 00003FFC +_LP_OSC 00003FF8 +_MCLRE_OFF 00003FDF +_MCLRE_ON 00003FFF +_PWRTE_OFF 00003FFF +_PWRTE_ON 00003FEF +_WDT_OFF 00003FF7 +_WDT_ON 00003FFF +_XT_OSC 00003FF9 +__16F684 00000001 +iDivRepeat 00000000 +maxPulseValue 00009C40 +minPulseValue 00004E20 +ms05Value 00002710 + MPASM 5.02 MAINMOTORDRIVER.ASM 3-29-2006 0:37:12 PAGE 15 + + +SYMBOL TABLE + LABEL VALUE + +ms1Value 00004E20 + + +MEMORY USAGE MAP ('X' = Used, '-' = Unused) + +0000 : X---XXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX +0040 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX +0080 : XXX------------- ---------------- ---------------- ---------------- + +All other memory blocks unused. + +Program Memory Words Used: 128 +Program Memory Words Free: 1920 + + +Errors : 0 +Warnings : 10 reported, 0 suppressed +Messages : 12 reported, 0 suppressed + + \ No newline at end of file diff --git a/MainMotorDriver/ASM/MainMotorDriver.mcp b/MainMotorDriver/ASM/MainMotorDriver.mcp new file mode 100755 index 0000000..054e1ab --- /dev/null +++ b/MainMotorDriver/ASM/MainMotorDriver.mcp @@ -0,0 +1,28 @@ +[HEADER] +magic_cookie={66E99B07-E706-4689-9E80-9B2582898A13} +file_version=1.0 +[PATH_INFO] +dir_src= +dir_bin= +dir_tmp= +dir_sin= +dir_inc= +dir_lib= +dir_lkr= +[CAT_FILTERS] +filter_src=*.asm +filter_inc=*.h;*.inc +filter_obj=*.o +filter_lib=*.lib +filter_lkr=*.lkr +[OTHER_FILES] +file_000=no +[FILE_INFO] +file_000=MainMotorDriver.asm +[SUITE_INFO] +suite_guid={6B3DAA78-59C1-46DD-B6AA-DBDAE4E06484} +suite_state= +[TOOL_SETTINGS] +TS{DD2213A8-6310-47B1-8376-9430CDFC013F}= +TS{BFD27FBA-4A02-4C0E-A5E5-B812F3E7707C}=/o"$(TARGETBASE).cof" +TS{ADE93A55-C7C7-4D4D-A4BA-59305F7D0391}= diff --git a/MainMotorDriver/ASM/MainMotorDriver.mcs b/MainMotorDriver/ASM/MainMotorDriver.mcs new file mode 100755 index 0000000..641f8ae --- /dev/null +++ b/MainMotorDriver/ASM/MainMotorDriver.mcs @@ -0,0 +1,49 @@ +[Header] +MagicCookie={0b13fe8c-dfe0-40eb-8900-6712719559a7} +Version=1.0 +[File000] +Location=MainMotorDriver.err +Folder=Intermediary +DeviceName=PIC16F684 +LanguageToolSuiteID={6B3DAA78-59C1-46DD-B6AA-DBDAE4E06484} +LanguageToolID={49D3CA3F-D9A3-4518-9943-226A347E8CC7} +LanguageToolLocation=C:\Program Files\Microchip\MPASM Suite\MPAsmWin.exe +PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)||$(INCDIR)||$(LIBDIR)||$(LKRDIR)|| +SOLK=|MainMotorDriver.asm|||||||| +SuiteArgsString= +ToolArgsString= +[File001] +Location=D:\-Project-\Wingman\MainMotorDriver\ASM\MainMotorDriver.cod +Folder=Output +DeviceName=PIC16F684 +LanguageToolSuiteID={6B3DAA78-59C1-46DD-B6AA-DBDAE4E06484} +LanguageToolID={49D3CA3F-D9A3-4518-9943-226A347E8CC7} +LanguageToolLocation=C:\Program Files\Microchip\MPASM Suite\MPAsmWin.exe +PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)||$(INCDIR)||$(LIBDIR)||$(LKRDIR)|| +SOLK=|MainMotorDriver.asm|||||||| +SuiteArgsString= +ToolArgsString= +[File002] +Location=D:\-Project-\Wingman\MainMotorDriver\ASM\MainMotorDriver.hex +Folder=Output +DeviceName=PIC16F684 +LanguageToolSuiteID={6B3DAA78-59C1-46DD-B6AA-DBDAE4E06484} +LanguageToolID={49D3CA3F-D9A3-4518-9943-226A347E8CC7} +LanguageToolLocation=C:\Program Files\Microchip\MPASM Suite\MPAsmWin.exe +PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)||$(INCDIR)||$(LIBDIR)||$(LKRDIR)|| +SOLK=|MainMotorDriver.asm|||||||| +SuiteArgsString= +ToolArgsString= +[File003] +Location=MainMotorDriver.lst +Folder=Output +DeviceName=PIC16F684 +LanguageToolSuiteID={6B3DAA78-59C1-46DD-B6AA-DBDAE4E06484} +LanguageToolID={49D3CA3F-D9A3-4518-9943-226A347E8CC7} +LanguageToolLocation=C:\Program Files\Microchip\MPASM Suite\MPAsmWin.exe +PPAD=$(BINDIR)||$(TMPDIR)||$(AINDIR)||$(INCDIR)||$(LIBDIR)||$(LKRDIR)|| +SOLK=|MainMotorDriver.asm|||||||| +SuiteArgsString= +ToolArgsString= +[TOOL_LOC_STAMPS] +tool_loc{49D3CA3F-D9A3-4518-9943-226A347E8CC7}=C:\Program Files\Microchip\MPASM Suite\MPAsmWin.exe diff --git a/MainMotorDriver/ASM/MainMotorDriver.mcw b/MainMotorDriver/ASM/MainMotorDriver.mcw new file mode 100755 index 0000000..45d55a5 Binary files /dev/null and b/MainMotorDriver/ASM/MainMotorDriver.mcw differ diff --git a/MainMotorDriver/ASM/MainMotorDriver.tagsrc b/MainMotorDriver/ASM/MainMotorDriver.tagsrc new file mode 100755 index 0000000..e69de29 diff --git a/MainMotorDriver/ASM/P16F684.INC b/MainMotorDriver/ASM/P16F684.INC new file mode 100755 index 0000000..d809347 --- /dev/null +++ b/MainMotorDriver/ASM/P16F684.INC @@ -0,0 +1,379 @@ + LIST +; P16F684.INC Standard Header File, Version 1.03 Microchip Technology, Inc. + NOLIST + +; This header file defines configurations, registers, and other useful bits of +; information for the PIC16F684 microcontroller. These names are taken to match +; the data sheets as closely as possible. + +; Note that the processor must be selected before this file is +; included. The processor may be selected the following ways: + +; 1. Command line switch: +; C:\ MPASM MYFILE.ASM /PIC16F684 +; 2. LIST directive in the source file +; LIST P=PIC16F684 +; 3. Processor Type entry in the MPASM full-screen interface + +;========================================================================== +; +; Revision History +; +;========================================================================== +;1.00 03/20/03 Original +;1.01 08/04/03 Updated CMCON1 address +;1.02 08/05/03 Updated names to match datasheet +;1.03 08/11/03 Updated ULPWUE bit name to match datasheet +;========================================================================== +; +; Verify Processor +; +;========================================================================== + + IFNDEF __16F684 + MESSG "Processor-header file mismatch. Verify selected processor." + ENDIF + +;========================================================================== +; +; Register Definitions +; +;========================================================================== + +W EQU H'0000' +F EQU H'0001' + +;----- Register Files------------------------------------------------------ + +INDF EQU H'0000' +TMR0 EQU H'0001' +PCL EQU H'0002' +STATUS EQU H'0003' +FSR EQU H'0004' +PORTA EQU H'0005' + +PORTC EQU H'0007' + +PCLATH EQU H'000A' +INTCON EQU H'000B' +PIR1 EQU H'000C' + +TMR1L EQU H'000E' +TMR1H EQU H'000F' +T1CON EQU H'0010' +TMR2 EQU H'0011' +T2CON EQU H'0012' +CCPR1L EQU H'0013' +CCPR1H EQU H'0014' +CCP1CON EQU H'0015' +PWM1CON EQU H'0016' +ECCPAS EQU H'0017' +WDTCON EQU H'0018' +CMCON0 EQU H'0019' +CMCON1 EQU H'001A' + +ADRESH EQU H'001E' +ADCON0 EQU H'001F' + + +OPTION_REG EQU H'0081' + +TRISA EQU H'0085' +TRISC EQU H'0087' + +PIE1 EQU H'008C' + +PCON EQU H'008E' +OSCCON EQU H'008F' +OSCTUNE EQU H'0090' +ANSEL EQU H'0091' +PR2 EQU H'0092' + +WPU EQU H'0095' +WPUA EQU H'0095' +IOC EQU H'0096' +IOCA EQU H'0096' + +VRCON EQU H'0099' +EEDAT EQU H'009A' +EEDATA EQU H'009A' +EEADR EQU H'009B' +EECON1 EQU H'009C' +EECON2 EQU H'009D' +ADRESL EQU H'009E' +ADCON1 EQU H'009F' + + +;----- STATUS Bits -------------------------------------------------------- + +IRP EQU H'0007' +RP1 EQU H'0006' +RP0 EQU H'0005' +NOT_TO EQU H'0004' +NOT_PD EQU H'0003' +Z EQU H'0002' +DC EQU H'0001' +C EQU H'0000' + +;----- INTCON Bits -------------------------------------------------------- + +GIE EQU H'0007' +PEIE EQU H'0006' +T0IE EQU H'0005' +INTE EQU H'0004' +RAIE EQU H'0003' +T0IF EQU H'0002' +INTF EQU H'0001' +RAIF EQU H'0000' + +;----- PIR1 Bits ---------------------------------------------------------- + +EEIF EQU H'0007' +ADIF EQU H'0006' +CCP1IF EQU H'0005' +C2IF EQU H'0004' +C1IF EQU H'0003' +OSFIF EQU H'0002' +T2IF EQU H'0001' +TMR2IF EQU H'0001' +T1IF EQU H'0000' +TMR1IF EQU H'0000' + +;----- T1CON Bits --------------------------------------------------------- + +T1GINV EQU H'0007' +TMR1GE EQU H'0006' +T1CKPS1 EQU H'0005' +T1CKPS0 EQU H'0004' +T1OSCEN EQU H'0003' +NOT_T1SYNC EQU H'0002' +TMR1CS EQU H'0001' +TMR1ON EQU H'0000' + +;----- T2CON Bits --------------------------------------------------------- + +TOUTPS3 EQU H'0006' +TOUTPS2 EQU H'0005' +TOUTPS1 EQU H'0004' +TOUTPS0 EQU H'0003' +TMR2ON EQU H'0002' +T2CKPS1 EQU H'0001' +T2CKPS0 EQU H'0000' + +;----- CCP1CON Bits ------------------------------------------------------- + +P1M1 EQU H'0007' +P1M0 EQU H'0006' +DC1B1 EQU H'0005' +DC1B0 EQU H'0004' +CCP1M3 EQU H'0003' +CCP1M2 EQU H'0002' +CCP1M1 EQU H'0001' +CCP1M0 EQU H'0000' + +;----- PWM1CON Bits ------------------------------------------------------- + +PRSEN EQU H'0007' +PDC6 EQU H'0006' +PDC5 EQU H'0005' +PDC4 EQU H'0004' +PDC3 EQU H'0003' +PDC2 EQU H'0002' +PDC1 EQU H'0001' +PDC0 EQU H'0000' + +;----- ECCPAS Bits -------------------------------------------------------- + +ECCPASE EQU H'0007' +ECCPAS2 EQU H'0006' +ECCPAS1 EQU H'0005' +ECCPAS0 EQU H'0004' +PSSAC1 EQU H'0003' +PSSAC0 EQU H'0002' +PSSBD1 EQU H'0001' +PSSBD0 EQU H'0000' + +;----- WDTCON Bits -------------------------------------------------------- + +WDTPS3 EQU H'0004' +WDTPS2 EQU H'0003' +WDTPS1 EQU H'0002' +WDTPS0 EQU H'0001' +SWDTEN EQU H'0000' + +;----- COMCON0 Bits ------------------------------------------------------- + +C2OUT EQU H'0007' +C1OUT EQU H'0006' +C2INV EQU H'0005' +C1INV EQU H'0004' +CIS EQU H'0003' +CM2 EQU H'0002' +CM1 EQU H'0001' +CM0 EQU H'0000' + +;----- COMCON1 Bits ------------------------------------------------------- + +T1GSS EQU H'0001' +C2SYNC EQU H'0000' + +;----- ADCON0 Bits -------------------------------------------------------- + +ADFM EQU H'0007' +VCFG EQU H'0006' +CHS2 EQU H'0004' +CHS1 EQU H'0003' +CHS0 EQU H'0002' +GO EQU H'0001' +NOT_DONE EQU H'0001' +GO_DONE EQU H'0001' +ADON EQU H'0000' + +;----- OPTION Bits -------------------------------------------------------- + +NOT_RAPU EQU H'0007' +INTEDG EQU H'0006' +T0CS EQU H'0005' +T0SE EQU H'0004' +PSA EQU H'0003' +PS2 EQU H'0002' +PS1 EQU H'0001' +PS0 EQU H'0000' + +;----- PIE1 Bits ---------------------------------------------------------- + +EEIE EQU H'0007' +ADIE EQU H'0006' +CCP1IE EQU H'0005' +C2IE EQU H'0004' +C1IE EQU H'0003' +OSFIE EQU H'0002' +T2IE EQU H'0001' +TMR2IE EQU H'0001' +T1IE EQU H'0000' +TMR1IE EQU H'0000' + +;----- PCON Bits ---------------------------------------------------------- + +ULPWUE EQU H'0005' +SBODEN EQU H'0004' +NOT_POR EQU H'0001' +NOT_BOD EQU H'0000' + +;----- OSCCON Bits -------------------------------------------------------- + +IRCF2 EQU H'0006' +IRCF1 EQU H'0005' +IRCF0 EQU H'0004' +OSTS EQU H'0003' +HTS EQU H'0002' +LTS EQU H'0001' +SCS EQU H'0000' + +;----- OSCTUNE Bits ------------------------------------------------------- + +TUN4 EQU H'0004' +TUN3 EQU H'0003' +TUN2 EQU H'0002' +TUN1 EQU H'0001' +TUN0 EQU H'0000' + +;----- ANSEL -------------------------------------------------------------- + +ANS7 EQU H'0007' +ANS6 EQU H'0006' +ANS5 EQU H'0005' +ANS4 EQU H'0004' +ANS3 EQU H'0003' +ANS2 EQU H'0002' +ANS1 EQU H'0001' +ANS0 EQU H'0000' + +;----- IOC -------------------------------------------------------------- + +IOC5 EQU H'0005' +IOC4 EQU H'0004' +IOC3 EQU H'0003' +IOC2 EQU H'0002' +IOC1 EQU H'0001' +IOC0 EQU H'0000' + +;----- IOCA -------------------------------------------------------------- + +IOCA5 EQU H'0005' +IOCA4 EQU H'0004' +IOCA3 EQU H'0003' +IOCA2 EQU H'0002' +IOCA1 EQU H'0001' +IOCA0 EQU H'0000' + +;----- VRCON Bits --------------------------------------------------------- + +VREN EQU H'0007' +VRR EQU H'0005' +VR3 EQU H'0003' +VR2 EQU H'0002' +VR1 EQU H'0001' +VR0 EQU H'0000' + +;----- EECON1 ------------------------------------------------------------- + +WRERR EQU H'0003' +WREN EQU H'0002' +WR EQU H'0001' +RD EQU H'0000' + +;----- ADCON1 ------------------------------------------------------------- + +ADCS2 EQU H'0006' +ADCS1 EQU H'0005' +ADCS0 EQU H'0004' + +;========================================================================== +; +; RAM Definition +; +;========================================================================== + + __MAXRAM H'FF' + __BADRAM H'06', H'08'-H'09', H'0D', H'1B'-H'1D' + __BADRAM H'86', H'88'-H'89', H'8D', H'93'-H'94', H'97'-H'98', H'C0'-H'EF' + +;========================================================================== +; +; Configuration Bits +; +;========================================================================== + +_FCMEN_ON EQU H'3FFF' +_FCMEN_OFF EQU H'37FF' +_IESO_ON EQU H'3FFF' +_IESO_OFF EQU H'3BFF' +_BOD_ON EQU H'3FFF' +_BOD_NSLEEP EQU H'3EFF' +_BOD_SBODEN EQU H'3DFF' +_BOD_OFF EQU H'3CFF' +_CPD_ON EQU H'3F7F' +_CPD_OFF EQU H'3FFF' +_CP_ON EQU H'3FBF' +_CP_OFF EQU H'3FFF' +_MCLRE_ON EQU H'3FFF' +_MCLRE_OFF EQU H'3FDF' +_PWRTE_OFF EQU H'3FFF' +_PWRTE_ON EQU H'3FEF' +_WDT_ON EQU H'3FFF' +_WDT_OFF EQU H'3FF7' +_LP_OSC EQU H'3FF8' +_XT_OSC EQU H'3FF9' +_HS_OSC EQU H'3FFA' +_EC_OSC EQU H'3FFB' +_INTRC_OSC_NOCLKOUT EQU H'3FFC' +_INTRC_OSC_CLKOUT EQU H'3FFD' +_EXTRC_OSC_NOCLKOUT EQU H'3FFE' +_EXTRC_OSC_CLKOUT EQU H'3FFF' +_INTOSCIO EQU H'3FFC' +_INTOSC EQU H'3FFD' +_EXTRCIO EQU H'3FFE' +_EXTRC EQU H'3FFF' + + LIST diff --git a/MainMotorDriver/MainMotorDriver.epb b/MainMotorDriver/MainMotorDriver.epb new file mode 100755 index 0000000..6e326ae Binary files /dev/null and b/MainMotorDriver/MainMotorDriver.epb differ diff --git a/MainMotorDriver/MainMotorDriver_Drv.epb b/MainMotorDriver/MainMotorDriver_Drv.epb new file mode 100755 index 0000000..e482bab Binary files /dev/null and b/MainMotorDriver/MainMotorDriver_Drv.epb differ diff --git a/MainMotorDriver/MainMotorDriver_Drv2.epb b/MainMotorDriver/MainMotorDriver_Drv2.epb new file mode 100755 index 0000000..ef2027b Binary files /dev/null and b/MainMotorDriver/MainMotorDriver_Drv2.epb differ diff --git a/MainMotorDriver/MainMotorDriver_OP.epb b/MainMotorDriver/MainMotorDriver_OP.epb new file mode 100755 index 0000000..d14e7cf Binary files /dev/null and b/MainMotorDriver/MainMotorDriver_OP.epb differ diff --git a/MainMotorDriver/Wingman MainMotorDriver.doc b/MainMotorDriver/Wingman MainMotorDriver.doc new file mode 100755 index 0000000..5ecb465 Binary files /dev/null and b/MainMotorDriver/Wingman MainMotorDriver.doc differ diff --git a/MainMotorDriver/WingmanMainMotorDriver_Layout.pdf b/MainMotorDriver/WingmanMainMotorDriver_Layout.pdf new file mode 100755 index 0000000..bb9eb5e Binary files /dev/null and b/MainMotorDriver/WingmanMainMotorDriver_Layout.pdf differ diff --git a/MainMotorDriver/WingmanMainMotorDriver_Schematic.pdf b/MainMotorDriver/WingmanMainMotorDriver_Schematic.pdf new file mode 100755 index 0000000..6248452 Binary files /dev/null and b/MainMotorDriver/WingmanMainMotorDriver_Schematic.pdf differ diff --git a/MainMotorDriver/WingmanMainMotorDriver_Screen.pdf b/MainMotorDriver/WingmanMainMotorDriver_Screen.pdf new file mode 100755 index 0000000..c62e902 Binary files /dev/null and b/MainMotorDriver/WingmanMainMotorDriver_Screen.pdf differ diff --git a/PPMDecoder/ASM/2313def.inc b/PPMDecoder/ASM/2313def.inc new file mode 100755 index 0000000..1bc163c --- /dev/null +++ b/PPMDecoder/ASM/2313def.inc @@ -0,0 +1,406 @@ +;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ******************** +;***** Created: 2005-01-11 10:30 ******* Source: AT90S2313.xml *********** +;************************************************************************* +;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y +;* +;* Number : AVR000 +;* File Name : "2313def.inc" +;* Title : Register/Bit Definitions for the AT90S2313 +;* Date : 2005-01-11 +;* Version : 2.14 +;* Support E-mail : avr@atmel.com +;* Target MCU : AT90S2313 +;* +;* DESCRIPTION +;* When including this file in the assembly program file, all I/O register +;* names and I/O register bit names appearing in the data book can be used. +;* In addition, the six registers forming the three data pointers X, Y and +;* Z have been assigned names XL - ZH. Highest RAM address for Internal +;* SRAM is also defined +;* +;* The Register names are represented by their hexadecimal address. +;* +;* The Register Bit names are represented by their bit number (0-7). +;* +;* Please observe the difference in using the bit names with instructions +;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" +;* (skip if bit in register set/cleared). The following example illustrates +;* this: +;* +;* in r16,PORTB ;read PORTB latch +;* sbr r16,(1<RCRXDecoder10-Jan-2005 22:30:0221-Apr-2005 22:31:30AVRAssembler.bmp010-Jan-2005 22:30:0244, 10, 0,345Atmel AVR Assemblerd:\-project-\rcrxdecoder\asm\rcrxdecoder.objD:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asmD:\-Project-\RCRXDecoder\ASM\ICE200AT90S2313256230170808183859910310711217317418018118418719720322122223124929925617180173172302311725617172561751falseR00R01R02R03R04R05R06R07R08R09R10R11R12R13R14R15R16R17R18R19R20R21R22R23R24R25R26R27R28R29R30R31COM1100Assembler File (*.asm)|*.asm;|AllFiles(*.*)|*.*|15127C:\Program Files\Atmel\AVR Tools\AvrAssembler2\Appnotes00000D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.map9600001D:\-Project-\RCRXDecoder\ASM\2313def.inc25700002D:\-Project-\RCRXDecoder\ASM\tn2313def.inc100003D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm26300004D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.map9600005D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.map9600006D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.map9600007D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.map9600008D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.map96-687 87 123 4930 0-665 109 145 5150 04 83 1020 688111 0Maximized diff --git a/PPMDecoder/ASM/RCRXDecoder.asm b/PPMDecoder/ASM/RCRXDecoder.asm new file mode 100755 index 0000000..32aae4f --- /dev/null +++ b/PPMDecoder/ASM/RCRXDecoder.asm @@ -0,0 +1,666 @@ +;========================================================================================================== +; +; CMtec RCRXDecoder copyright 2005 v1.0 (2005-01-23) +; +; Name: Christoffer Martinsson +; E-mail: cm@wsm.se +; +; 7ch PPM decoder for RC-Receivers. +; Based on Atmel AT90S2313 or ATTiny2313 with 10 or 20Mhz crystal. +; +; This DSP is build on the idea of having one inputDecoding and one outputEncoding working simultanius. +; This to manage decode seven (or more) channels and not to be bound to use the "spare"-time at the end +; of the pulseFrame. +; +; PORTB,PB0-PB7 assign to output ch 1 to ch 7 (ch 8 reserved) +; PORTD,PD2 assign to input PPM-signal from RX +; PORTD,PD3 assign to StoreButton/Jumper +; PORTD,PD4 assign to red LED +; PORTD,PD5 assign to yellow LED +; +; The inputsignal is decoded into two separate buffert locations in the SRAM. The output-routine work +; with the buffert that the input-routine NOT currently working with. After a "good" frame is decoded, +; the buffertPointer is switched. This to ensure that a "good" pulseframe allways is available if a error +; should occur. +; +; +; * Up to 8 channels +; * 100step/ms resolution at 10Mhz, 200step/ms resolution at 20Mhz +; * Allways a "good" output-signal +; * Output is "Freezed" if error occurs +; * Failsafe sets predefined values if error not recovered in (recomended) 2sec (max 8sec/10Mhz, 4sec/20Mhz) +; * Failsafe-value easily changed by pressing a button +; * PulseValue filtered to a smooth average-value +; * Error/Glitch indicator +; +;========================================================================================================== +; Processor-type +.EQU AT90S2313 = 1 +;.EQU ATTiny2313 = 1 + +.NOLIST ; Disable listfile generation +.ifdef AT90S2313 +.INCLUDE "2313def.inc" +.else +.INCLUDE "tn2313def.inc" +.endif +.LIST ; Reenable listfile generation + +; General definitions +; Adjust this numbers to make it work propely with your application + +.EQU XTAL =10 ; Used crystal (Mhz) (min 10Mhz) +.EQU RecoveryNr =1 ; Number of "good" pulseFrames to recover from error-state +.EQU NrOfChannels =7 ; Numbers of channels (max 8) +.EQU FailSafeTime =2 ; Time before enter failsafe (sec) (max 8sec/10Mhz, 4sec/20Mhz) + +; 8bit register +.DEF temp =r16 ; Temporary register +.DEF nextSRAMAddress =r12 ; Register for storing secondary SRAMAddress (buffert2) +.DEF debounceFilter =r15 ; Button-debounce register +.DEF timeout =r17 ; Timeout counter +.DEF chAddressEE =r18 ; EEPROM channelAddress +.DEF chAddressIn =r19 ; Input channelAddress +.DEF chAddressOut =r20 ; Output channelAddress +.DEF chAddressFS =r21 ; Failsafe channelAddress +.DEF pulseError =r22 ; PulseErrorCounter +.DEF pulseFlag =r23 ; Flag register + +; "16bit" register +.DEF frameCalcL =r13 ; Register for calculate FrameTime +.DEF frameCalcH =r14 +.DEF tempL =r24 ; Temporary register +.DEF tempH =r25 +.DEF pulseInL =r26 ; InputPulseCounter +.DEF pulseInH =r27 +.DEF pulseOutL =r28 ; OutputPulseCounter +.DEF pulseOutH =r29 + +; pulseFlag bit-definitions +.EQU SYNC =0 ; Sync found-Flag +.EQU LEDredActive =1 ; LEDred Active-Flag +.EQU LEDyellowActive =2 ; LEDyellow Active-Flag +.EQU BuffertToUse =3 ; Buffert-Flag (0=buffert1, 1=buffert2) + +; Output bit-definitions +.EQU PPMSignal =2 ; PD2 Input for PPM-signal +.EQU StoreButton =3 ; PD3 Input for StoreButton +.EQU LEDred =4 ; PD4 Output for LEDred +.EQU LEDyellow =5 ; PD5 Output for LEDyellow + +; Memory definitions +.EQU SRAMaddress1 =0x0060 ; Startlocation for buffert1 in SRAM +.EQU SRAMAddress2 =0x0074 ; Startlocation for buffert2 in SRAM +.EQU EEPROMaddress =0x0000 ; Startlocation for failsafe-storage in EEPROM + +; Time definitions (timer0) +.EQU FSTimeoutTime =(2*XTAL*FailSafeTime) ; 1sec*FailSafeTime + +; Time definitions (timer1) +.EQU MinPulseTime =(95*(XTAL/10)) ; ~0,95ms +.EQU MaxPulseTime =(220*(XTAL/10)) ; ~2,2ms +.EQU MinSyncTime =(400*(XTAL/10)) ; ~4ms +.EQU MaxSyncTime =(1400*(XTAL/10)) ; ~14ms +.EQU FrameTime =(1950*(XTAL/10)) ; ~20ms + +.CSEG ; CODE segment +.ORG 0 +;========================================================================================================== +; Reset- and Interrupt-vectors +;========================================================================================================== + RJMP Main ; Reset Handler + RJMP Ex_Int0 ; External Interrupt0 Handler + RETI ; External Interrupt1 Handler + RETI ; Timer1 Capture Handler + RJMP Timer_Int1 ; Timer1 CompareA Handler + RETI ; Timer1 Overflow Handler + RJMP Timer_Int0 ; Timer0 Overflow Handler + RETI ; USART0 RX Complete Handler + RETI ; USART0,UDR Empty Handler + RETI ; USART0 TX Complete Handler + RETI ; Analog Comparator Handler + +.ifdef ATTiny2313 + + RETI ; Pin Change Interrupt + RETI ; Timer1 Compare B Handler + RETI ; Timer0 Compare A Handler + RETI ; Timer0 Compare B Handler + RETI ; USI Start Handler + RETI ; USI Overflow Handler + RETI ; EEPROM Ready Handler + RETI ; Watchdog Overflow Handler +.endif +;========================================================================================================== +; Macro +;========================================================================================================== +;---------------------------------------------------------------------------------------------------------- +; Load16Temp +; +; Description: Load 16bit tempReg with 16bit @0-value +; +; Input: @0,@1 +; ChangedReg: tempH,tempL +; UsedReg: tempH,tempL +;---------------------------------------------------------------------------------------------------------- +.MACRO Load16Temp + LDI tempH,HIGH(@0) + LDI tempL,LOW(@0) +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; Compare16Temp +; +; Description: Compare 16bit tempReg with 16bit @0,@1-reg +; +; Input: @0,@1 +; ChangedReg: Carry +; UsedReg: tempH,tempL +;---------------------------------------------------------------------------------------------------------- +.MACRO Compare16Temp + CP tempL,@1 + CPC tempH,@0 +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; Clear16Reg +; +; Description: Clear 16bit @0,@1-register +; +; Input: @0,@1 +; ChangedReg: @0,@1 +; UsedReg: - +;---------------------------------------------------------------------------------------------------------- +.MACRO Clear16Reg + CLR @0 + CLR @1 +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; Add16Reg +; +; Description: Add 16bit @2,@3 to 16bit @0,@1 +; +; Input: @0,@1 +; ChangedReg: @0,@1,Carry +; UsedReg: - +;---------------------------------------------------------------------------------------------------------- +.MACRO Add16Reg + ADD @1,@3 + ADC @0,@2 +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; Sub16Reg +; +; Description: Subtract 16bit @2,@3 from 16bit @0,@1 +; +; Input: @0,@1 +; ChangedReg: @0,@1,Carry +; UsedReg: - +;---------------------------------------------------------------------------------------------------------- +.MACRO Sub16Reg + SUB @1,@3 + SBC @0,@2 +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; DivByTwo16Reg +; +; Description: Divide 16bit @0,@1 by two +; +; Input: @0,@1 +; ChangedReg: @0,@1 +; UsedReg: - +;---------------------------------------------------------------------------------------------------------- +.MACRO DivByTwo16Reg + CLC + ROR @0 + ROR @1 +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; Write16SRAM +; +; Description: Write data in 16bit @1,@2-reg to SRAM at position @0 +; +; (BuffertToUse-Flag: 0=buffert1, 1=buffert2) +; +; Input: @0,@1,@2 +; ChangedReg: - +; UsedReg: ZL,pulseFlag +;---------------------------------------------------------------------------------------------------------- +.MACRO Write16SRAM + LDI ZL,LOW(SRAMaddress1) + SBRC pulseFlag,BuffertToUse + ADD ZL,nextSRAMAddress + ADD ZL,@0 + ST Z+,@1 + ST Z,@2 +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; Read16SRAM +; +; Description: Read data in SRAM at position @0 to 16bir @1,@2-reg +; +; (BuffertToUse-Flag: 0=buffert1, 1=buffert2) +; +; Input: @0,@1,@2 +; ChangedReg: @1,@2 +; UsedReg: ZL,pulseFlag +;---------------------------------------------------------------------------------------------------------- +.MACRO Read16SRAM + LDI ZL,LOW(SRAMaddress1) + SBRC pulseFlag,BuffertToUse + ADD ZL,nextSRAMAddress + ADD ZL,@0 + LD @1,Z+ + LD @2,Z +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; Write16EEPROM +; +; Description: Write data in 16bit @1,@2-reg to EEPROM at position @0 +; +; Input: @0,@1,@2 +; ChangedReg: - +; UsedReg: temp,EECR,EEARL,EEDR +;---------------------------------------------------------------------------------------------------------- +.MACRO Write16EEPROM +MWEEWait1: SBIC EECR,1 + RJMP MWEEWait1 + LDI temp,LOW(EEPROMaddress) + ADD temp,@0 + OUT EEARL,temp + OUT EEDR,@1 + SBI EECR,EEMWE + SBI EECR,EEWE + +MWEEWait2: SBIC EECR,1 + RJMP MWEEWait2 + LDI temp,LOW(EEPROMaddress) + ADD temp,@0 + INC temp + OUT EEARL,temp + OUT EEDR,@2 + SBI EECR,EEMWE + SBI EECR,EEWE +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; Read16EEPROM +; +; Description: Read data in EEPROM at position @0 to 16bir @1,@2-reg +; +; Input: @0,@1,@2 +; ChangedReg: @1,@2 +; UsedReg: temp,EECR,EEARL,EEDR +;---------------------------------------------------------------------------------------------------------- +.MACRO Read16EEPROM +MREEWait1: SBIC EECR,1 + RJMP MREEWait1 + LDI temp,LOW(EEPROMaddress) + ADD temp,@0 + OUT EEARL,temp + SBI EECR,EERE + IN @1,EEDR + +MREEWait2: SBIC EECR,1 + RJMP MREEWait2 + LDI temp,LOW(EEPROMaddress) + ADD temp,@0 + INC temp + OUT EEARL,temp + SBI EECR,EERE + IN @2,EEDR +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; StartTimer0 +; +; Description: Start timer0. Prescale set to CK/1024 +; +; Input: - +; ChangedReg: - +; UsedReg: temp,TCCR0 +;---------------------------------------------------------------------------------------------------------- +.MACRO StartTimer0 + LDI temp,0x05 + OUT TCCR0,temp ; Prescale set to CK/1024 +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; StopTimer0 +; +; Description: Stop timer0 +; +; Input: - +; ChangedReg: - +; UsedReg: temp,TCCR0 +;---------------------------------------------------------------------------------------------------------- +.MACRO StopTimer0 + CLR temp + OUT TCCR0,temp +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; StartTimer1 +; +; Description: Star timer1. Prescale set to CK +; +; Input: - +; ChangedReg: - +; UsedReg: temp,OCR1AH,OCR1AL,TCCR1B +;---------------------------------------------------------------------------------------------------------- +.MACRO StartTimer1 + LDI temp,HIGH(100) + OUT OCR1AH,temp + LDI temp,LOW(100) + OUT OCR1AL,temp + LDI temp,0x09 + OUT TCCR1B,temp ; Prescale set to CK +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; StopTimer1 +; +; Description: Stop timer1 +; +; Input: - +; ChangedReg: - +; UsedReg: temp,TCCR1B +;---------------------------------------------------------------------------------------------------------- +.MACRO StopTimer1 + CLR temp + OUT TCCR1B,temp +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; StoreTempOnStack +; +; Description: Store Status and temp-register on Stack +; +; Input: - +; ChangedReg: - +; UsedReg: temp,tempH,tempL,SREG +;---------------------------------------------------------------------------------------------------------- +.MACRO StoreTempOnStack + PUSH tempH + PUSH tempL + PUSH temp + IN temp,SREG + PUSH temp +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; RestoreTempFromStack +; +; Description: Restore Status and temp-register from Stack +; +; Input: - +; ChangedReg: temp,tempH,tempL,SREG +; UsedReg: temp,tempH,tempL,SREG +;---------------------------------------------------------------------------------------------------------- +.MACRO RestoreTempFromStack + POP temp + OUT SREG,temp + POP temp + POP tempL + POP tempH +.ENDMACRO +;---------------------------------------------------------------------------------------------------------- +; SwitchBuffert +; +; Description: Switches buffertPointer in SRAM (BuffertToUse-Flag: 0=buffert1, 1=buffert2) +; +; Input: - +; ChangedReg: pulseFlag +; UsedReg: temp,pulseFlag +;---------------------------------------------------------------------------------------------------------- +.MACRO SwitchBuffert + LDI temp,(1< MinSyncTime + BRCC Error; ; If not then jump to Error + Load16Temp MaxSyncTime + Compare16Temp pulseInH,pulseInL ; Check if pulseIn < MaxSyncTime + BRCS Error ; If not then jump to Error + SBR pulseFlag,(1< MinPulseTime + BRCC Error ; If not then jump to Error + Load16Temp MaxPulseTime + Compare16Temp pulseInH,pulseInL ; Check if pulseIn < MaxPulseTime + BRCS Error ; If not then jump to Error + + CPI pulseError,0 ; Check if pulseError == 0 + BREQ NoError ; If true then jump to NoError + DEC pulseError ; Decrement pulseError + + INC chAddressIn ; Increment pulseOut-address twice + INC chAddressIn + CPI chAddressIn,(NrOfChannels*2) ; Check if chAddress == (NrOfChannels*2) + BRNE ChkErrExit ; If not then jump to ChkErrExit + CBR pulseFlag,(1< MinSyncTime + BRCC Error; + Load16Temp MaxSyncTime + Compare16Temp pulseInH,pulseInL ; Check if pulseIn < MaxSyncTime + BRCS Error + SBR pulseFlag,(1< MinPulseTime + BRCC Error + Load16Temp MaxPulseTime + Compare16Temp pulseInH,pulseInL ; Check if pulseIn < MaxPulseTime + BRCS Error + + CPI pulseError,0 ; Check if pulseError == 0 + BREQ NoError + DEC pulseError ; Decrement pulseError + + INC chAddressIn ; Increment pulseOut-address twice + INC chAddressIn + CPI chAddressIn,(NrOfChannels*2) ; Check if chAddress == (NrOfChannels*2) + BRNE ChkErrExit + CBR pulseFlag,(1< + c:\ + + C:\Program Files\Atmel\AVR Tools\AvrAssembler2\Appnotes + + + D:\-Project-\RCRXDecoder\ASM\2313def.inc + + +
D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm564
+ D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm420 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm502 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm539 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm422 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm437 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm459 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm433 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm467 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm455 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm463 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm494 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm511 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm519 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm530 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm546 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm558 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm598 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm621 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm624 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm628 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm626 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm631 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm635 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm633 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm639 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm644 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm651 + D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm660 + + diff --git a/PPMDecoder/ASM/rcrxdecoder.eep b/PPMDecoder/ASM/rcrxdecoder.eep new file mode 100755 index 0000000..1996e8f --- /dev/null +++ b/PPMDecoder/ASM/rcrxdecoder.eep @@ -0,0 +1 @@ +:00000001FF diff --git a/PPMDecoder/ASM/rcrxdecoder.gen b/PPMDecoder/ASM/rcrxdecoder.gen new file mode 100755 index 0000000..e9f9211 --- /dev/null +++ b/PPMDecoder/ASM/rcrxdecoder.gen @@ -0,0 +1,374 @@ +000000:c0f0 +000001:c009 +000002:9518 +000003:9518 +000004:c07c +000005:9518 +000006:c0b0 +000007:9518 +000008:9518 +000009:9518 +00000a:9518 +00000b:939f +00000c:938f +00000d:930f +00000e:b70f +00000f:930f +000010:fd70 +000011:c014 +000012:e091 +000013:e980 +000014:178a +000015:079b +000016:f558 +000017:e095 +000018:e788 +000019:178a +00001a:079b +00001b:f130 +00001c:6071 +00001d:2733 +00001e:27bb +00001f:27aa +000020:910f +000021:bf0f +000022:910f +000023:918f +000024:919f +000025:9518 +000026:e090 +000027:e58f +000028:178a +000029:079b +00002a:f4b8 +00002b:e090 +00002c:ed8c +00002d:178a +00002e:079b +00002f:f090 +000030:3060 +000031:f0d9 +000032:956a +000033:9533 +000034:9533 +000035:303e +000036:f419 +000037:7f7e +000038:24ee +000039:24dd +00003a:27bb +00003b:27aa +00003c:910f +00003d:bf0f +00003e:910f +00003f:918f +000040:919f +000041:9518 +000042:7f7e +000043:6072 +000044:e067 +000045:27bb +000046:27aa +000047:910f +000048:bf0f +000049:910f +00004a:918f +00004b:919f +00004c:9518 +00004d:2711 +00004e:2755 +00004f:e005 +000050:bf03 +000051:e6e0 +000052:fd73 +000053:0dec +000054:0fe3 +000055:9191 +000056:8180 +000057:0fa8 +000058:1fb9 +000059:9488 +00005a:95b7 +00005b:95a7 +00005c:e6e0 +00005d:fd73 +00005e:0dec +00005f:0fe3 +000060:93b1 +000061:83a0 +000062:0eda +000063:1eeb +000064:9533 +000065:9533 +000066:303e +000067:f489 +000068:7f7e +000069:e097 +00006a:e98e +00006b:198d +00006c:099e +00006d:e6e0 +00006e:fd73 +00006f:0dec +000070:0fe3 +000071:9391 +000072:8380 +000073:e008 +000074:2770 +000075:7f7d +000076:7f7b +000077:24ee +000078:24dd +000079:27bb +00007a:27aa +00007b:910f +00007c:bf0f +00007d:910f +00007e:918f +00007f:919f +000080:9518 +000081:939f +000082:938f +000083:930f +000084:b70f +000085:930f +000086:9611 +000087:9621 +000088:3040 +000089:f411 +00008a:e001 +00008b:bb08 +00008c:e008 +00008d:2770 +00008e:e6e0 +00008f:fd73 +000090:0dec +000091:0fe4 +000092:9191 +000093:8180 +000094:e008 +000095:2770 +000096:178c +000097:079d +000098:f030 +000099:910f +00009a:bf0f +00009b:910f +00009c:918f +00009d:919f +00009e:9518 +00009f:304e +0000a0:f069 +0000a1:b308 +0000a2:0f00 +0000a3:bb08 +0000a4:9543 +0000a5:9543 +0000a6:27dd +0000a7:27cc +0000a8:910f +0000a9:bf0f +0000aa:910f +0000ab:918f +0000ac:919f +0000ad:9518 +0000ae:2744 +0000af:27dd +0000b0:27cc +0000b1:910f +0000b2:bf0f +0000b3:910f +0000b4:918f +0000b5:919f +0000b6:9518 +0000b7:939f +0000b8:938f +0000b9:930f +0000ba:b70f +0000bb:930f +0000bc:3218 +0000bd:f039 +0000be:9513 +0000bf:910f +0000c0:bf0f +0000c1:910f +0000c2:918f +0000c3:919f +0000c4:9518 +0000c5:6074 +0000c6:99e1 +0000c7:cffe +0000c8:e000 +0000c9:0f05 +0000ca:bb0e +0000cb:9ae0 +0000cc:b39d +0000cd:99e1 +0000ce:cffe +0000cf:e000 +0000d0:0f05 +0000d1:9503 +0000d2:bb0e +0000d3:9ae0 +0000d4:b38d +0000d5:e6e0 +0000d6:fd73 +0000d7:0dec +0000d8:0fe5 +0000d9:9391 +0000da:8380 +0000db:e008 +0000dc:2770 +0000dd:e6e0 +0000de:fd73 +0000df:0dec +0000e0:0fe5 +0000e1:9391 +0000e2:8380 +0000e3:e008 +0000e4:2770 +0000e5:9553 +0000e6:9553 +0000e7:3150 +0000e8:f411 +0000e9:2700 +0000ea:bf03 +0000eb:910f +0000ec:bf0f +0000ed:910f +0000ee:918f +0000ef:919f +0000f0:9518 +0000f1:ed0f +0000f2:bf0d +0000f3:94f8 +0000f4:e000 +0000f5:bd01 +0000f6:b908 +0000f7:ef0f +0000f8:bb07 +0000f9:9a8c +0000fa:9a8d +0000fb:9a92 +0000fc:9a93 +0000fd:e400 +0000fe:bf0b +0000ff:e002 +000100:bf05 +000101:e402 +000102:bf09 +000103:2744 +000104:2733 +000105:2755 +000106:2711 +000107:2777 +000108:27ff +000109:27bb +00010a:27aa +00010b:27dd +00010c:27cc +00010d:e104 +00010e:2ec0 +00010f:99e1 +000110:cffe +000111:e000 +000112:0f02 +000113:bb0e +000114:9ae0 +000115:b39d +000116:99e1 +000117:cffe +000118:e000 +000119:0f02 +00011a:9503 +00011b:bb0e +00011c:9ae0 +00011d:b38d +00011e:e6e0 +00011f:fd73 +000120:0dec +000121:0fe2 +000122:9391 +000123:8380 +000124:e008 +000125:2770 +000126:e6e0 +000127:fd73 +000128:0dec +000129:0fe2 +00012a:9391 +00012b:8380 +00012c:e008 +00012d:2770 +00012e:9523 +00012f:9523 +000130:3120 +000131:f6e9 +000132:7f7e +000133:6072 +000134:e067 +000135:9478 +000136:e000 +000137:bd0b +000138:e604 +000139:bd0a +00013a:e009 +00013b:bd0e +00013c:e005 +00013d:bf03 +00013e:fd72 +00013f:c002 +000140:9895 +000141:c001 +000142:9a95 +000143:fd71 +000144:c002 +000145:9894 +000146:c002 +000147:9a94 +000148:cff5 +000149:9983 +00014a:24ff +00014b:94f3 +00014c:f789 +00014d:94f8 +00014e:9a95 +00014f:2700 +000150:bb08 +000151:2722 +000152:e008 +000153:2770 +000154:e6e0 +000155:fd73 +000156:0dec +000157:0fe2 +000158:9191 +000159:8180 +00015a:99e1 +00015b:cffe +00015c:e000 +00015d:0f02 +00015e:bb0e +00015f:bb9d +000160:9ae2 +000161:9ae1 +000162:99e1 +000163:cffe +000164:e000 +000165:0f02 +000166:9503 +000167:bb0e +000168:bb8d +000169:9ae2 +00016a:9ae1 +00016b:9523 +00016c:9523 +00016d:3120 +00016e:f729 +00016f:9895 +000170:e008 +000171:2770 +000172:9b83 +000173:cffe +000174:9478 +000175:cfc8 diff --git a/PPMDecoder/ASM/rcrxdecoder.hex b/PPMDecoder/ASM/rcrxdecoder.hex new file mode 100755 index 0000000..4d73137 --- /dev/null +++ b/PPMDecoder/ASM/rcrxdecoder.hex @@ -0,0 +1,49 @@ +:020000020000FC +:10000000F0C009C0189518957CC01895B0C0189517 +:100010001895189518959F938F930F930FB70F937B +:1000200070FD14C091E080E98A179B0758F595E0B0 +:1000300088E78A179B0730F171603327BB27AA270F +:100040000F910FBF0F918F919F91189590E08FE5C1 +:100050008A179B07B8F490E08CED8A179B0790F005 +:100060006030D9F06A95339533953E3019F47E7F30 +:10007000EE24DD24BB27AA270F910FBF0F918F918C +:100080009F9118957E7F726067E0BB27AA270F912A +:100090000FBF0F918F919F9118951127552705E05C +:1000A00003BFE0E673FDEC0DE30F91918081A80F93 +:1000B000B91F8894B795A795E0E673FDEC0DE30FA3 +:1000C000B193A083DA0EEB1E339533953E3089F45D +:1000D0007E7F97E08EE98D199E09E0E673FDEC0DB9 +:1000E000E30F9193808308E070277D7F7B7FEE2470 +:1000F000DD24BB27AA270F910FBF0F918F919F91EE +:1001000018959F938F930F930FB70F931196219686 +:10011000403011F401E008BB08E07027E0E673FD11 +:10012000EC0DE40F9191808108E070278C179D07FA +:1001300030F00F910FBF0F918F919F9118954E3016 +:1001400069F008B3000F08BB43954395DD27CC2722 +:100150000F910FBF0F918F919F9118954427DD2725 +:10016000CC270F910FBF0F918F919F9118959F935F +:100170008F930F930FB70F93183239F013950F9198 +:100180000FBF0F918F919F9118957460E199FECFE9 +:1001900000E0050F0EBBE09A9DB3E199FECF00E0B1 +:1001A000050F03950EBBE09A8DB3E0E673FDEC0DF1 +:1001B000E50F9193808308E07027E0E673FDEC0D76 +:1001C000E50F9193808308E0702753955395503144 +:1001D00011F4002703BF0F910FBF0F918F919F91D3 +:1001E00018950FED0DBFF8940FEF07BB8C9A8D9A01 +:1001F000929A939A00E40BBF02E005BF02E409BFA4 +:10020000442733275527222711277727FF27BB2786 +:10021000AA27DD27CC2704E1C02EE199FECF00E01C +:10022000020F0EBBE09A9DB3E199FECF00E0020FF2 +:1002300003950EBBE09A8DB3E0E673FDEC0DE20F83 +:100240009193808308E07027E0E673FDEC0DE20FE8 +:100250009193808308E07027239523952031E9F658 +:100260007E7F726067E0789400E00BBD04E60ABD13 +:1002700009E00EBD05E003BF72FD02C0959801C004 +:10028000959A71FD02C0949802C0949AF5CF839913 +:10029000FF24F39489F7F894959A002708BB222746 +:1002A00008E07027E0E673FDEC0DE20F919180818C +:1002B000E199FECF00E0020F0EBB9DBBE29AE19AEE +:1002C000E199FECF00E0020F03950EBB8DBBE29AD1 +:1002D000E19A23952395203129F7959808E0702716 +:0802E000839BFECF7894C8CF88 +:00000001FF diff --git a/PPMDecoder/ASM/rcrxdecoder.map b/PPMDecoder/ASM/rcrxdecoder.map new file mode 100755 index 0000000..90ff91e --- /dev/null +++ b/PPMDecoder/ASM/rcrxdecoder.map @@ -0,0 +1,318 @@ + +AVRASM ver. 2.0.28 D:\-Project-\RCRXDecoder\ASM\RCRXDecoder.asm Thu Apr 21 19:17:36 2005 + + +EQU at90s2313 00000001 +EQU signature_000 0000001e +EQU signature_001 00000091 +EQU signature_002 00000001 +EQU sreg 0000003f +EQU spl 0000003d +EQU gimsk 0000003b +EQU gifr 0000003a +EQU timsk 00000039 +EQU tifr 00000038 +EQU mcucr 00000035 +EQU tccr0 00000033 +EQU tcnt0 00000032 +EQU tccr1a 0000002f +EQU tccr1b 0000002e +EQU tcnt1h 0000002d +EQU tcnt1l 0000002c +EQU ocr1ah 0000002b +EQU ocr1al 0000002a +EQU icr1h 00000025 +EQU icr1l 00000024 +EQU wdtcr 00000021 +EQU eear 0000001e +EQU eedr 0000001d +EQU eecr 0000001c +EQU portb 00000018 +EQU ddrb 00000017 +EQU pinb 00000016 +EQU portd 00000012 +EQU ddrd 00000011 +EQU pind 00000010 +EQU udr 0000000c +EQU usr 0000000b +EQU ucr 0000000a +EQU ubrr 00000009 +EQU acsr 00000008 +EQU portb0 00000000 +EQU pb0 00000000 +EQU portb1 00000001 +EQU pb1 00000001 +EQU portb2 00000002 +EQU pb2 00000002 +EQU portb3 00000003 +EQU pb3 00000003 +EQU portb4 00000004 +EQU pb4 00000004 +EQU portb5 00000005 +EQU pb5 00000005 +EQU portb6 00000006 +EQU pb6 00000006 +EQU portb7 00000007 +EQU pb7 00000007 +EQU ddb0 00000000 +EQU ddb1 00000001 +EQU ddb2 00000002 +EQU ddb3 00000003 +EQU ddb4 00000004 +EQU ddb5 00000005 +EQU ddb6 00000006 +EQU ddb7 00000007 +EQU pinb0 00000000 +EQU pinb1 00000001 +EQU pinb2 00000002 +EQU pinb3 00000003 +EQU pinb4 00000004 +EQU pinb5 00000005 +EQU pinb6 00000006 +EQU pinb7 00000007 +EQU toie0 00000001 +EQU tov0 00000001 +EQU cs00 00000000 +EQU cs01 00000001 +EQU cs02 00000002 +EQU tcnt00 00000000 +EQU tcnt01 00000001 +EQU tcnt02 00000002 +EQU tcnt03 00000003 +EQU tcnt04 00000004 +EQU tcnt05 00000005 +EQU tcnt06 00000006 +EQU tcnt07 00000007 +EQU ticie1 00000003 +EQU ocie1a 00000006 +EQU toie1 00000007 +EQU icf1 00000003 +EQU ocf1a 00000006 +EQU tov1 00000007 +EQU pwm10 00000000 +EQU pwm11 00000001 +EQU com1a0 00000006 +EQU com1a1 00000007 +EQU cs10 00000000 +EQU cs11 00000001 +EQU cs12 00000002 +EQU ctc1 00000003 +EQU ices1 00000006 +EQU icnc1 00000007 +EQU wdp0 00000000 +EQU wdp1 00000001 +EQU wdp2 00000002 +EQU wde 00000003 +EQU wdtoe 00000004 +EQU wdde 00000004 +EQU int0 00000006 +EQU int1 00000007 +EQU intf0 00000006 +EQU intf1 00000007 +EQU udr0 00000000 +EQU udr1 00000001 +EQU udr2 00000002 +EQU udr3 00000003 +EQU udr4 00000004 +EQU udr5 00000005 +EQU udr6 00000006 +EQU udr7 00000007 +EQU dor 00000003 +EQU fe 00000004 +EQU udre 00000005 +EQU txc 00000006 +EQU rxc 00000007 +EQU txb8 00000000 +EQU rxb8 00000001 +EQU chr9 00000002 +EQU txen 00000003 +EQU rxen 00000004 +EQU udrie 00000005 +EQU txcie 00000006 +EQU rxcie 00000007 +EQU ubrr0 00000000 +EQU ubrr1 00000001 +EQU ubrr2 00000002 +EQU ubrr3 00000003 +EQU ubrr4 00000004 +EQU ubrr5 00000005 +EQU ubrr6 00000006 +EQU ubrr7 00000007 +EQU acis0 00000000 +EQU acis1 00000001 +EQU acic 00000002 +EQU acie 00000003 +EQU aci 00000004 +EQU aco 00000005 +EQU acd 00000007 +EQU sreg_c 00000000 +EQU sreg_z 00000001 +EQU sreg_n 00000002 +EQU sreg_v 00000003 +EQU sreg_s 00000004 +EQU sreg_h 00000005 +EQU sreg_t 00000006 +EQU sreg_i 00000007 +EQU sp0 00000000 +EQU sp1 00000001 +EQU sp2 00000002 +EQU sp3 00000003 +EQU sp4 00000004 +EQU sp5 00000005 +EQU sp6 00000006 +EQU sp7 00000007 +EQU isc00 00000000 +EQU isc01 00000001 +EQU isc10 00000002 +EQU isc11 00000003 +EQU sm 00000004 +EQU se 00000005 +EQU portd0 00000000 +EQU pd0 00000000 +EQU portd1 00000001 +EQU pd1 00000001 +EQU portd2 00000002 +EQU pd2 00000002 +EQU portd3 00000003 +EQU pd3 00000003 +EQU portd4 00000004 +EQU pd4 00000004 +EQU portd5 00000005 +EQU pd5 00000005 +EQU portd6 00000006 +EQU pd6 00000006 +EQU ddd0 00000000 +EQU ddd1 00000001 +EQU ddd2 00000002 +EQU ddd3 00000003 +EQU ddd4 00000004 +EQU ddd5 00000005 +EQU ddd6 00000006 +EQU pind0 00000000 +EQU pind1 00000001 +EQU pind2 00000002 +EQU pind3 00000003 +EQU pind4 00000004 +EQU pind5 00000005 +EQU pind6 00000006 +EQU eearl 0000001e +EQU eear0 00000000 +EQU eear1 00000001 +EQU eear2 00000002 +EQU eear3 00000003 +EQU eear4 00000004 +EQU eear5 00000005 +EQU eear6 00000006 +EQU eedr0 00000000 +EQU eedr1 00000001 +EQU eedr2 00000002 +EQU eedr3 00000003 +EQU eedr4 00000004 +EQU eedr5 00000005 +EQU eedr6 00000006 +EQU eedr7 00000007 +EQU eere 00000000 +EQU eewe 00000001 +EQU eemwe 00000002 +EQU lb1 00000000 +EQU lb2 00000001 +DEF xh r27 +DEF xl r26 +DEF yh r29 +DEF yl r28 +DEF zh r31 +DEF zl r30 +EQU flashend 000003ff +EQU ioend 0000003f +EQU sram_start 00000060 +EQU sram_size 00000080 +EQU ramend 000000df +EQU xramend 00000000 +EQU e2end 0000007f +EQU eepromend 0000007f +EQU eeadrbits 00000007 +EQU int0addr 00000001 +EQU int1addr 00000002 +EQU icp1addr 00000003 +EQU oc1addr 00000004 +EQU ovf1addr 00000005 +EQU ovf0addr 00000006 +EQU urxcaddr 00000007 +EQU udreaddr 00000008 +EQU utxcaddr 00000009 +EQU aciaddr 0000000a +EQU int_vectors_size 0000000b +EQU xtal 0000000a +EQU recoverynr 00000001 +EQU nrofchannels 00000007 +EQU failsafetime 00000002 +DEF temp r16 +DEF nextsramaddress r12 +DEF debouncefilter r15 +DEF timeout r17 +DEF chaddressee r18 +DEF chaddressin r19 +DEF chaddressout r20 +DEF chaddressfs r21 +DEF pulseerror r22 +DEF pulseflag r23 +DEF framecalcl r13 +DEF framecalch r14 +DEF templ r24 +DEF temph r25 +DEF pulseinl r26 +DEF pulseinh r27 +DEF pulseoutl r28 +DEF pulseouth r29 +EQU sync 00000000 +EQU ledredactive 00000001 +EQU ledyellowactive 00000002 +EQU bufferttouse 00000003 +EQU ppmsignal 00000002 +EQU storebutton 00000003 +EQU ledred 00000004 +EQU ledyellow 00000005 +EQU sramaddress1 00000060 +EQU sramaddress2 00000074 +EQU eepromaddress 00000000 +EQU fstimeouttime 00000028 +EQU minpulsetime 0000005f +EQU maxpulsetime 000000dc +EQU minsynctime 00000190 +EQU maxsynctime 00000578 +EQU frametime 0000079e +CSEG main 000000f1 +CSEG ex_int0 0000000b +CSEG timer_int1 00000081 +CSEG timer_int0 000000b7 +CSEG chksync 00000010 +CSEG chkerror 00000026 +CSEG error 00000042 +CSEG chksyncexit 0000001e +CSEG noerror 0000004d +CSEG chkerrexit 0000003a +CSEG errorexit 00000045 +CSEG noerrorexit 00000079 +CSEG readopulse 0000008c +CSEG nextopulse 0000009f +CSEG resetopulse 000000ae +CSEG copypulsees 000000c5 +CSEG mreewait1@read16eeprom@1126 000000c6 +CSEG mreewait2@read16eeprom@1126 000000cd +CSEG nextpulsees 000000eb +CSEG initmemes 0000010d +CSEG mreewait1@read16eeprom@1229 0000010d +CSEG mreewait2@read16eeprom@1229 00000114 +CSEG mainloop 0000013c +CSEG ledy 0000013c +CSEG ledyon 00000140 +CSEG ledyoff 0000013e +CSEG ledr 00000141 +CSEG ledron 00000145 +CSEG ledroff 00000143 +CSEG checkbutton 00000147 +CSEG bpressed 0000014b +CSEG copypulsese 00000152 +CSEG mweewait1@write16eeprom@1340 00000158 +CSEG mweewait2@write16eeprom@1340 00000160 +CSEG buttonloop 00000170 diff --git a/PPMDecoder/ASM/rcrxdecoder.mot b/PPMDecoder/ASM/rcrxdecoder.mot new file mode 100755 index 0000000..3f01d13 --- /dev/null +++ b/PPMDecoder/ASM/rcrxdecoder.mot @@ -0,0 +1,51 @@ +S02F0000643A5C2D70726F6A6563742D5C726372786465636F6465725C61736D5C726372786465636F6465722E6D6F7488 +S1130000F8C011C01895189584C01895B8C01895F3 +S11300101895189518951895189518951895189574 +S11300201895189518959F938F930F930FB70F9367 +S113003070FD14C093E080E28A179B0758F59AE09C +S113004080EF8A179B0730F171603327BB27AA27FB +S11300500F910FBF0F918F919F91189590E08EEBA8 +S11300608A179B07B8F491E088EB8A179B0790F0F6 +S11300706030D9F06A95339533953E3019F47E7F1C +S1130080EE24DD24BB27AA270F910FBF0F918F9178 +S11300909F9118957E7F726067E0BB27AA270F9116 +S11300A00FBF0F918F919F9118951127552705E048 +S11300B003BFE0E673FDEC0DE30F91918081A80F7F +S11300C0B91F8894B795A795E0E673FDEC0DE30F8F +S11300D0B193A083DA0EEB1E339533953E3089F449 +S11300E07E7F9FE08CE38D199E09E0E673FDEC0DA5 +S11300F0E30F9193808308E070277D7F7B7FEE245C +S1130100DD24BB27AA270F910FBF0F918F919F91D9 +S113011018959F938F930F930FB70F931196219672 +S1130120403011F401E008BB08E07027E0E673FDFD +S1130130EC0DE40F9191808108E070278C179D07E6 +S113014030F00F910FBF0F918F919F9118954E3002 +S113015069F008B3000F08BB43954395DD27CC270E +S11301600F910FBF0F918F919F9118954427DD2711 +S1130170CC270F910FBF0F918F919F9118959F934B +S11301808F930F930FB70F93103539F013950F9189 +S11301900FBF0F918F919F9118957460E199FECFD5 +S11301A000E0050F0EBBE09A9DB3E199FECF00E09D +S11301B0050F03950EBBE09A8DB3E0E673FDEC0DDD +S11301C0E50F9193808308E07027E0E673FDEC0D62 +S11301D0E50F9193808308E0702753955395503130 +S11301E011F4002703BF0F910FBF0F918F919F91BF +S11301F018950FED0DBFF8940FEF07BB8C9A8D9AED +S1130200929A939A00E40BBF02E005BF02E409BF8F +S113021044273327552711277727FF27BB27AA27EA +S1130220DD27CC2704E1C02EE199FECF00E0020FC8 +S11302300EBBE09A9DB3E199FECF00E0020F039557 +S11302400EBBE09A8DB3E0E673FDEC0DE20F9193E3 +S1130250808308E07027E0E673FDEC0DE20F9193D4 +S1130260808308E07027239523952031E9F67E7F6B +S1130270726067E0789400E00BBD04E60ABD09E013 +S11302800EBD05E003BF72FD02C0959801C0959AAA +S113029071FD02C0949802C0949AF5CF8399FF240B +S11302A0F39489F7F894959A002708BB222708E06D +S11302B07027E0E673FDEC0DE20F91918081E199E6 +S11302C0FECF00E0020F0EBB9DBBE29AE19AE199DA +S11302D0FECF00E0020F03950EBB8DBBE29AE19ABC +S11302E023952395203129F7959808E07027839B5F +S10902F0FECF7894C8CF94 +S5030030CC +S9030000FC diff --git a/PPMDecoder/ASM/rcrxdecoder.obj b/PPMDecoder/ASM/rcrxdecoder.obj new file mode 100755 index 0000000..cc83d02 Binary files /dev/null and b/PPMDecoder/ASM/rcrxdecoder.obj differ diff --git a/PPMDecoder/ASM/tn2313def.inc b/PPMDecoder/ASM/tn2313def.inc new file mode 100755 index 0000000..0797ace --- /dev/null +++ b/PPMDecoder/ASM/tn2313def.inc @@ -0,0 +1,660 @@ +;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ******************** +;***** Created: 2005-01-11 10:31 ******* Source: ATtiny2313.xml ********** +;************************************************************************* +;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y +;* +;* Number : AVR000 +;* File Name : "tn2313def.inc" +;* Title : Register/Bit Definitions for the ATtiny2313 +;* Date : 2005-01-11 +;* Version : 2.14 +;* Support E-mail : avr@atmel.com +;* Target MCU : ATtiny2313 +;* +;* DESCRIPTION +;* When including this file in the assembly program file, all I/O register +;* names and I/O register bit names appearing in the data book can be used. +;* In addition, the six registers forming the three data pointers X, Y and +;* Z have been assigned names XL - ZH. Highest RAM address for Internal +;* SRAM is also defined +;* +;* The Register names are represented by their hexadecimal address. +;* +;* The Register Bit names are represented by their bit number (0-7). +;* +;* Please observe the difference in using the bit names with instructions +;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" +;* (skip if bit in register set/cleared). The following example illustrates +;* this: +;* +;* in r16,PORTB ;read PORTB latch +;* sbr r16,(1<